Renesas Electronics /R7FA6M5BH /SDHI0 /SD_CLK_CTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SD_CLK_CTRL

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0x00)CLKSEL0 (0)CLKEN 0 (0)CLKCTRLEN

CLKSEL=0x00, CLKCTRLEN=0, CLKEN=0

Description

SD Clock Control Register

Fields

CLKSEL

SDHI Clock Frequency Select

0 (Others): Setting prohibited

0 (0x00): PCLKB/2

1 (0x01): PCLKB/4

2 (0x02): PCLKB/8

4 (0x04): PCLKB/16

8 (0x08): PCLKB/32

16 (0x10): PCLKB/64

32 (0x20): PCLKB/128

64 (0x40): PCLKB/256

128 (0x80): PCLKB/512

255 (0xFF): PCLKB

CLKEN

SD/MMC Clock Output Control

0 (0): Disable SD/MMC clock output (fix SDnCLK signal low)

1 (1): Enable SD/MMC clock output

CLKCTRLEN

SD/MMC Clock Output Automatic Control Select

0 (0): Disable automatic control of SD/MMC clock output

1 (1): Enable automatic control of SD/MMC clock output

Links

() ()